A System on a Chip or System on Chip (SoC or SOC) is an integrated circuit (IC) that integrates all components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions on a single chip substrate. Open Multimedia Application Platform (OMAP) is an application processor that integrate components of a computer system on a single chip. OMAP processors consist of a processor core and a group of Internet protocol (IP) modules. OMAP supports multimedia by providing hardware acceleration and interfacing with peripheral devices. Such OMAP processors are utilized as Core Engine Modem processor in radio systems.
Programmable logic devices (PLDs) exist as a well-known type of Integrated Circuit (IC) that can be programmed by a user to perform specified logic functions. The PLDs can be of programmable logic arrays (PLAs) or Complex Programmable Logic Devices (CPLDs). One type of PLD, called a Field Gate Array (FPGA), is popular because of a superior combination of capacity, flexibility, time-to-market, and cost.
In radio systems, interface between the Core Engine Modem processor and the Field Programmable Gate Array (FPGA) is implemented with a General Purpose Memory Controller bus configured for burst mode. In normal operations, General Purpose Memory Controller bus is efficiently utilized for quickly sending large amounts of data between the devices.
FIG. 1 illustrates a block diagram of a processor 102 configured with a FPGA 104 having an interface using a chip select CS4 for burst mode in radio system. The Core Engine Modem's OMAP processor 104 communicates with the waveform FPGA 106 via a General Purpose Memory Interface bus GPMC configured for burst mode using chip select CS4. The bus GPMC supports high speed transfer of large amounts of data to the peripherals 112 of FPGA 104 such as the RF FPGA 106, DAC 108, and ADC 110. The bus GPMC is desired for normal operation where large blocks of data needs to be transferred quickly between devices.
The burst operation of the bus GPMC is not useful during integration because block transfers cannot be easily initiated through the debug port on the OMAP. A need, therefore, exists for a method that allows individual register access during system integration and test through a separate chip select by adding special logic in the FPGA.